1. Field
One or more example embodiments of the following description relate to a Direct Memory Access (DMA) device for a multi-core system, and an operating method of the DMA device that may classify a source channel start signal and a destination channel start signal, and may perform an operation when both the source channel start signal and the destination channel start signal are set, thereby simplifying an implementation of a program and preventing waste of a cycle due to a control.
2. Description of the Related Art
A Direct Memory Access (DMA) device refers to hardware configured to enable parallel data transmission in order to increase a data transmission rate of a Central Processing Unit (CPU).
Generally, most systems including CPUs include DMA devices.
A DMA device has the primary purpose of transmitting data in parallel while the CPU performs a predetermined operation.
When the DMA device is used, a processing time may be saved in an operation of the CPU, and burst transmission may be internally possible, thereby reducing a bus bandwidth.
A basic operating method of the DMA device is simple.
When the CPU sets parameters required to operate the DMA device and starts the DMA device, the DMA device may verify a start signal and the parameters, and may transfer data from a source core to a destination core.
When transfer of the data is completed, the DMA device may set a register, or transmit an interrupt signal to the CPU, in order to notify the CPU of completion of the data transfer. Thus, the DMA device allows certain hardware to access memory relatively independently of the CPU.
Currently, a large number of systems employing CPUs may use a plurality of cores to improve performances of the systems. Such multi-core processors may use DMA for intra-chip data transfers.